Additional Technical References

Chapter 15:   Electromigration (EM) Reliability Analysis

  1. Kitchin, John, "Statistical Electromigration Budgeting for Reliable Design and Verification in a 300-MHz Microprocessor", 1995 Symposium on VLSI Circuits Digest of Technical Papers, p. 115 - 116.

  2. Lienig, Jens, "Electromigration and Its Impact on Physical Design in Future Technologies", 2013 ACM International Symposium on Physical Design (ISPD), p. 33-40.

  3. Banerjee, K., and Mehrotra, A., "Coupled Analysis of Electromigration Reliability and Performance in ULSI Signal Nets", Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2001.

  4. Tao, Jiang, Cheung, Nathan, and Hu, Chenming, "Metal Electromigration Damage Healing Under Bidirectional Current Stress", IEEE Electron Device Letters, Volume 14, Number 12, December, 1993, p. 554-556.

  5. Jerke, Goran, and Leinig, Jens, "Early-Stage Determination of Current-Density Criticality in Interconnects", Proceedings of the 11th IEEE International Symposium on Quality Electronic Design (ISQED), 2010, p. 667-674.

  6. Lienig, Jens, "An Introduction to Electromigration-Aware Design", Proceedings of the 2005 IEEE Conference on System-Level Interconnect Prediction (SLIP), p. 81-88.

  7. Mau, Hendrik, "Designing Integrated Circuits to Reduce Temperature Induced Electromigration Effects", US Patent 6,532,570 B1, Issued March 11, 2003.

  8. Banerjee, K., and Mehrotra, A., "Global Interconnect Warming", IEEE Circuits and Devices, September 2001, p. 16-32.

  9. "BEOL Interconnect Reliability", JEDEC Standard No. JESD85, Chapter 8.

© 2019 by Thomas Dillinger