Additional Technical References

Chapter 4:   Cell and IP Modeling

  1. BSIM-CMG Multi-Gate MOSFET Compact Model Technical Manual, available for download from the BSIM group at the University of California-Berkeley, http://bsim.berkeley.edu

  2. Hatami, S., et al., "Efficient compression and handling of current source model library waveforms", Proceedings of the Conference on Design, Automation, and Test in Europe (DATE), 2009, p. 1178-1183.

  3. Chandrakasan, A.P., and Brodersen, R.W., "Low-Power CMOS Digital Design", IEEE Journal of Solid State Circuits, Vol. 27, No. 4, April 1992, p. 473-484.

  4. Zhu, Qing, et al., "Optimal Sizing of High-Speed Clock Networks Based on Distributed RC and Lossy Transmission Line Models", Proceedings of the 1993 International Conference on Computer-Aided Design (ICCAD).

© 2019 by Thomas Dillinger