Additional Technical References

Chapter 7:   Logic Synthesis

  1. Takach, Andres, "High-Level Synthesis: Status, Trends, and Future Directions", IEEE Design & Test, May/June, 2016, p. 116 - 124.

  2. Pagiamtzis, K., et al., "Content-Addressable Memory (CAM) Circuits and Architectures:  A Tutorial and Survey", IEEE Journal of Solid-State Circuits, Volume 41, No. 3, March, 2006, p. 712-727.

© 2019 by Thomas Dillinger